library STD, IEEE;
use STD.TEXTIO.all;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_textio.all;
use IEEE.std_logic_unsigned.all;

entity SIGDUMP is
end SIGDUMP;

architecture SIM_DATA of SIGDUMP is


signal START        : std_logic;
signal RXIN0DB      : std_logic_vector(7 downto 0);
signal RXIN100DB    : std_logic_vector(7 downto 0);
signal REF          : std_logic;
signal DEMOD        : std_logic;
signal ENABLE       : std_logic;
signal CLK          : std_logic := '0';
signal COUNT        : std_logic_vector(2 downto 0);
signal DIFF         : std_logic;
signal ECOUNT,TCOUNT: integer := 0;

begin

-- Sysetem CLK generation
      CLK <= not CLK after 5 ns;

-- TEST VECTOR
  P1: process
      file TEXT1_IN     : text is in "start.txt";
      file TEXT2_IN     : text is in "rxin0DB.txt";
      file TEXT3_IN     : text is in "rxin100DB.txt";
      variable LINE1_IN : line;
      variable LINE2_IN : line;
      variable LINE3_IN : line;
      variable V_START  : std_logic;
      variable V_RXIN0DB     : std_logic_vector(7 downto 0);
      variable V_RXIN100DB   : std_logic_vector(7 downto 0);
  begin
      readline(TEXT1_IN, LINE1_IN);
      read(LINE1_IN, V_START);
      START <= V_START;
      readline(TEXT2_IN, LINE2_IN);
      read(LINE2_IN, V_RXIN0DB);
      RXIN0DB <= V_RXIN0DB;
      readline(TEXT3_IN, LINE3_IN);
      read(LINE3_IN, V_RXIN100DB);
      RXIN100DB <= V_RXIN100DB;
      wait for 10 ns;
      if endfile(TEXT1_IN) then
        wait;
      end if;
  end process;

-- CORRECT SIGNAL : REF
-- DEMOD SIGNAL   : DEMOD
  process(CLK) begin
    if (CLK'event and CLK='1') then
      REF   <= RXIN100DB(7);
      DEMOD <= RXIN0DB(7);
    end if;
  end process;

-- ENABLE GENERATOR
  process(CLK) begin
    if (CLK'event and CLK='1') then
      if(START='1') then COUNT <= "111";
      else
       if(COUNT(2)='1') then COUNT <= COUNT - 1;
       else COUNT <= COUNT;
       end if;
      end if;
    end if;
  end process;

  ENABLE <= COUNT(2);

-- ERROR COUNTER
  DIFF <= DEMOD xor REF;
  process(CLK) begin
    if (CLK'event and CLK='0') then
      if (ENABLE='1') then 
            TCOUNT <= TCOUNT + 1;
            if (DIFF='1') then ECOUNT <= ECOUNT +1;
            end if;
      end if;
    end if;
  end process;
    

end SIM_DATA;

configuration CFG_SIGDUMP of SIGDUMP is
  for SIM_DATA
  end for;
end CFG_SIGDUMP;