-- small instruction set MIPS machine
-- supported instructions : LW, SW, ADD, SUB, AND, OR, SLT, BEQ, J
-- Tom Wada 1999/7
library IEEE;
use IEEE.STD_LOGIC_1164.all, IEEE.NUMERIC_STD.all;

use WORK.ALU_PKG.all;

entity MINIMIPS is
    port ( Clock   : in  std_logic;
	   Reset   : in  std_logic;               -- reset when it is '1' 
	   Iadd    : out unsigned (5 downto 0);   -- Address for IROM
	   Inst    : in  unsigned (31 downto 0);  -- Instruction from IROM
	   Dadd    : out unsigned (5 downto 0);   -- Address for DRAM
	   WE      : out std_logic;               -- DRAM Write Enable
           Wtdata  : out unsigned (31 downto 0);  -- Write data to DRAM
	   Rddata  : in  unsigned (31 downto 0) );  -- Read data from DRAM
end entity MINIMIPS;

architecture RTL of MINIMIPS is

HERE, WRITE YOUR OWN ARCHITECTURE DESCRIPTION!

end architecture RTL;