****************************************
Report : timing
        -path full
        -delay max
        -max_paths 1
        -sort_by group
Design : ADDER4
Version: Z-2007.03
Date   : Mon Nov  5 04:13:48 2007
****************************************

Operating Conditions: 
Wire Load Model Mode: top

  Startpoint: B[0] (input port)
  Endpoint: S[4] (output port)
  Path Group: (none)
  Path Type: max

  Des/Clust/Port     Wire Load Model       Library
  ------------------------------------------------
  ADDER4             05x05                 class

  Point                                    Incr       Path
  -----------------------------------------------------------
  input external delay                     0.00       0.00 f
  B[0] (in)                                0.00       0.00 f
  U4/Z (AN2)                               0.97       0.97 f
  U7/Z (OR2)                               0.93       1.90 f
  U8/Z (AO2)                               1.49       3.39 r
  U11/Z (IV)                               0.30       3.69 f
  U12/Z (OR2)                              0.93       4.63 f
  U13/Z (AO2)                              1.80       6.43 r
  U17/Z (ND2)                              0.25       6.68 f
  U18/Z (EON1)                             0.90       7.58 f
  S[4] (out)                               0.00       7.58 f
  data arrival time                                   7.58
  -----------------------------------------------------------
  (Path is unconstrained)