-- package for SRP library IEEE; use IEEE.STD_LOGIC_1164.all; use IEEE.STD_LOGIC_ARITH.all; use IEEE.STD_LOGIC_UNSIGNED; package ALU_PKG is -- opecode constant OP_LW : std_logic_vector (5 downto 0) := "100011"; constant OP_SW : std_logic_vector (5 downto 0) := "101011"; constant OP_ALU : std_logic_vector (5 downto 0) := "000000"; constant OP_ADD : std_logic_vector (5 downto 0) := "000000"; constant OP_AND : std_logic_vector (5 downto 0) := "000000"; constant OP_OR : std_logic_vector (5 downto 0) := "000000"; constant OP_SUB : std_logic_vector (5 downto 0) := "000000"; constant OP_SLT : std_logic_vector (5 downto 0) := "000000"; constant OP_BEQ : std_logic_vector (5 downto 0) := "000100"; constant OP_J : std_logic_vector (5 downto 0) := "000010"; -- function code for ADD, SUB, SLT constant FN_ADD : std_logic_vector (5 downto 0) := "100000"; constant FN_AND : std_logic_vector (5 downto 0) := "100100"; constant FN_OR : std_logic_vector (5 downto 0) := "100101"; constant FN_SUB : std_logic_vector (5 downto 0) := "100010"; constant FN_SLT : std_logic_vector (5 downto 0) := "101001"; -- registers constant R0 : std_logic_vector (4 downto 0) := "00000"; constant R1 : std_logic_vector (4 downto 0) := "00001"; constant R2 : std_logic_vector (4 downto 0) := "00010"; constant R3 : std_logic_vector (4 downto 0) := "00011"; constant R4 : std_logic_vector (4 downto 0) := "00100"; constant R5 : std_logic_vector (4 downto 0) := "00101"; constant R6 : std_logic_vector (4 downto 0) := "00110"; constant R7 : std_logic_vector (4 downto 0) := "00111"; constant R8 : std_logic_vector (4 downto 0) := "01000"; constant R9 : std_logic_vector (4 downto 0) := "01001"; constant R10 : std_logic_vector (4 downto 0) := "01010"; constant R11 : std_logic_vector (4 downto 0) := "01011"; constant R12 : std_logic_vector (4 downto 0) := "01100"; constant R13 : std_logic_vector (4 downto 0) := "01101"; constant R14 : std_logic_vector (4 downto 0) := "01110"; constant R15 : std_logic_vector (4 downto 0) := "01111"; constant R16 : std_logic_vector (4 downto 0) := "10000"; constant R17 : std_logic_vector (4 downto 0) := "10001"; constant R18 : std_logic_vector (4 downto 0) := "10010"; constant R19 : std_logic_vector (4 downto 0) := "10011"; constant R20 : std_logic_vector (4 downto 0) := "10100"; constant R21 : std_logic_vector (4 downto 0) := "10101"; constant R22 : std_logic_vector (4 downto 0) := "10110"; constant R23 : std_logic_vector (4 downto 0) := "10111"; constant R24 : std_logic_vector (4 downto 0) := "11000"; constant R25 : std_logic_vector (4 downto 0) := "11001"; constant R26 : std_logic_vector (4 downto 0) := "11010"; constant R27 : std_logic_vector (4 downto 0) := "11011"; constant R28 : std_logic_vector (4 downto 0) := "11100"; constant R29 : std_logic_vector (4 downto 0) := "11101"; constant R30 : std_logic_vector (4 downto 0) := "11110"; constant R31 : std_logic_vector (4 downto 0) := "11111"; end package ALU_PKG;